Job Description
Hiring: PCIe Verification Engineer | Bangalore | 5+ Years
We are hiring PCIe Verification Engineers for Bangalore location with strong hands-on experience in SystemVerilog & UVM and deep understanding of PCIe protocol.
Location
Bangalore
⏳ Experience
5+ Years
Key Responsibilities
- Develop UVM-based testbench & verification environments
- Create test plans, testcases, sequences & coverage models
- Perform protocol-level verification (PCIe layers – PHY, DLL, TL)
- Debug issues using waveforms, logs & assertions
- Work on regression, coverage closure & sign-off activities
Required Skills
- Strong expertise in SystemVerilog & UVM
- Hands-on experience in PCIe (Gen3/4/5/6...
Ready to Apply?
Submit your application today and join our talented team at Silicon Patterns.
Submit ApplicationJob Details
- Location bengaluru, karnataka
- Job Type Full-time
- Category Other-General
- Posted Date June 09, 2026
- Application Deadline July 19, 2026