Verification Engineer - Sr Staff

InvenSense

📍 France, France, France 💼 Full-time 🕒 Posted June 23, 2026

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Job Description

                Responsibilities Technical Leadership
Lead end-to-end verification of complex digital IP blocks and subsystems
Define and implement comprehensive verification strategies and test plans
Develop advanced UVM testbench architectures and reusable verification components
Drive coverage closure and sign-off quality metrics
Perform block-level and system-level verification
Methodology & Infrastructure
Develop and enhance verification methodologies and flows
Create and maintain advanced verification infrastructure using Python/Perl/TCL scripting
Build behavioral models and reference models for complex protocols
Implement coverage-driven and assertion-based verification strategies
Optimize simulation performance and regression efficiency
Collaboration & Mentorship
Work closely with design, architecture...
            

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Job Details

Location France, France
Job Type Full-time
Category Engineers
Posted Date June 23, 2026
Application Deadline August 02, 2026