Staff Engineer – DFT Engineering

Analog Devices

📍 Yelahanka, Karnataka, India 💼 Full time 🕒 Posted May 31, 2026

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Job Description

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Job Description:
We are seeking a skilled and experienced DFT Engineer to join our VLSI design team. The ideal candidate should have a strong background in Design for Testability (DFT) techniques, including LBIST (Logic Built-In Self-Test), ATPG (Automatic Test Pattern Generation), DFT DRC (Design Rule Checking), MBIST (Memory Built-in Sefl-Test), Boundary Scan, JTAG and Analog/Phy DFT.
Responsibilities:
Collaborate with the design team to ensure efficient and effective testability of complex integrated circuits.
Design and implement DFT features such as scan chains, compression, and built-in self-test structures to enhance testability.
Conduct DFT DRC checks in RTL/Netlist database to ensure compliance with DFT guidelines and rules.
Utilize Cadence/Siemen’s DFT tool to perform DFT analysis and optimize testability metrics.
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Job Details

Location Yelahanka, Karnataka

Job Type Full time

Category Engineers

Posted Date May 31, 2026

Application Deadline July 10, 2026