Senior Serdes System Design Engineer/Architect

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Job Description:

This is a DSP/Systems Design Engineering position for high-speed Serdes products in the Physical Layer Products (PLP) Division. You will join a team of expert communication system/mixed-signal ASIC designers involved in the design, verification, and implementation of advanced signal processing algorithms for the physical layer of high-speed Serdes at speeds of 100G+. 
The types of algorithms that will be implemented include PAM & other higher-order modulation, single/multi-input adaptive equalizers/cancellers, single/multi-dimensioned FEC, digital filters, and interface/integration with analog functions and analysis and compensation for analog circuit non-idealities....

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