Senior RTL Design Engineer

Sasken Technologies Limited
📍 bangalore, bangalore, India 💼 Full-time 🕒 Posted February 27, 2026

Job Description

Job Title: Senior FPGA RTL Design Engineer / Principal FPGA Engineer

Experience: 10 Years Above

Location: Bangalore (Onsite)

Employment Type: Full-Time

Role Overview

We are seeking a highly skilled and experienced FPGA RTL Design Engineer with deep hands‑on expertise in RTL coding, FPGA build flows, integration, prototyping, and custom IP development . The ideal candidate will bring strong experience in FPGA platforms, high‑speed interfaces, ASIC‑to‑FPGA conversion, and system‑level debugging , along with proven contributions across multiple semiconductor organizations.

This role requires strong ownership, technical depth, and the ability to collaborate across digital, verification, ASIC, and cross‑functional engineering teams.

Key Responsibilities

FPGA RTL Design & Integration

  • Develop and integrate RTL modules using Verilog/SystemVeril...

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Job Details

  • Location bangalore, bangalore
  • Job Type Full-time
  • Category Other-General
  • Posted Date February 27, 2026
  • Application Deadline April 08, 2026