Senior IP Design Engineer - FPGA Safety Lead

Lattice Semiconductor
📍 george town, penang, Malaysia 💼 Full-time 🕒 Posted June 26, 2026

Job Description

Lattice Semiconductor is seeking a qualified candidate in George Town, Penang, for a role focused on the design and development of Lattice Foundation IP. The successful applicant will lead safety qualification research and collaborate closely with cross-functional teams to manage the IP release cycle.

Candidates should hold a Bachelor’s or Master’s degree in relevant fields, boasting over 8 years of experience in SoC and FPGA development. Responsibilities include aligning product features with safety requirements and conducting thorough testing and validation.

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Job Details

  • Location george town, penang
  • Job Type Full-time
  • Category Management & Operations
  • Posted Date June 26, 2026
  • Application Deadline August 05, 2026