Job Description
Job Description1. Design verification of SerDes in I/O Chiplet to collaborate with analog/digital/algorithm design teams from prototype testchip to mass production.
2. Responsible for implementing SerDes firmware design used for link performance validation and mass production tests.
3. Responsible for establishing automatic test and data analysis for SerDes silicon charaterization and failed chip analysis
#LI-DC3Requirement1. Master's degree in electrical engineering, communication, or equivalent.
2. Knowledgeable about Wireline Communication principle, such as SerDes, USB, PCIe, MIPI, and etc.
3. Experience with firmware driver design
4. Knowledgeable about analog or digital Frontend principle, such as Rx, Tx, PLL, CDR, EQ, and etc is plus
5. Experience with automated test development is a plus
6. Experience with test instruments (PPG, BERT, Scope, etc) operation is a plus
2. Responsible for implementing SerDes firmware design used for link performance validation and mass production tests.
3. Responsible for establishing automatic test and data analysis for SerDes silicon charaterization and failed chip analysis
#LI-DC3Requirement1. Master's degree in electrical engineering, communication, or equivalent.
2. Knowledgeable about Wireline Communication principle, such as SerDes, USB, PCIe, MIPI, and etc.
3. Experience with firmware driver design
4. Knowledgeable about analog or digital Frontend principle, such as Rx, Tx, PLL, CDR, EQ, and etc is plus
5. Experience with automated test development is a plus
6. Experience with test instruments (PPG, BERT, Scope, etc) operation is a plus
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Submit ApplicationJob Details
- Location Hsinchu City, Taiwan Province
- Job Type Full-time
- Category Engineers
- Posted Date July 02, 2026
- Application Deadline August 11, 2026