Job Description
Key Responsibilities 1.
FPGA-Based System Architecture • Define FPGA-centric system architectures for high-throughput data processing platforms • Partition functionality across FPGA, ADC/DAC, and host interfaces • Collaborate with FPGA/FW teams on interface definition, timing, and performance 2.
High-Speed Digital & SerDes Design • Design and integrate high-speed interfaces including:
- o DDR4/DDR memory subsystems o PCIe Gen3/Gen4 interfaces o QSFP (10G/25G/40G/100G) links o 10G+ SerDes channels • Define routing constraints, stack-up, and impedance control • Ensure signal integrity, timing closure, and link stability Public 3.
Mixed-Signal & Analog Front-End Design • Design and integrate:
- o High-speed ADC/DAC signal chains o Data Converter Architectures (DCA) o Precision analog front-end (AFE) circuits • Develop circuits using low-noise OpAmps, filters...
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Submit ApplicationJob Details
- Location San Jose, California
- Job Type Full-time
- Category Engineers
- Posted Date July 02, 2026
- Application Deadline August 11, 2026