Job Description
Job description:
- Perform Digital Physical Implementation for complex integrated circuits
- Execute all the steps of RTL2GDS flow (synthesis, floorplan, Place&Route, EMIR analysis, ECO flows)
- Interact with digital designers to refine SDC timing constraints for synthesis and place & route
- Run Static Timing Analysis (STA) and Signoff checks
- Help to debug designs at both pre- and post-silicon
- Collaborate with cross-functional teams to deliver optimized backend solutions
- Master’s degree in Electronics Engineering, Electrical Engineering, Physics or similar
- Strong proficiency in digital backend design tools and flows (Cadence flow)
- Solid understanding of Signoff Checks (timing closure, signal integrity, EMIR, physical verification)
- Ability to work independently and in team environments
- Excellent problem-solving and communication skil...
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Submit ApplicationJob Details
- Location Pavia, Lombardy
- Job Type Full-time
- Category Computer Occupations
- Posted Date June 08, 2026
- Application Deadline July 18, 2026