Senior Design Verification Engineer

Espressif Systems
📍 Singapore, Singapore, Singapore 💼 Full-time 🕒 Posted June 08, 2026

Job Description

We are looking for a Senior Design Verification Engineer to work on Espressif's next-generation wireless and AI-capable SoCs. You will work closely with RTL designers and chip architects, and provide technical leadership within a small verification sub-team.


Job Responsibilities

  • Define verification plans and test cases based on design specifications, and own the verification environment end-to-end
  • Collaborate with design engineers to identify and resolve design defects, and continuously drive verification coverage improvement
  • Maintain simulation/verification environments using industry-standard EDA tools
  • Write scripts to automate testing workflows in Python, Perl, TCL, or Shell
  • Track and report code/functional coverage metrics; identify and close gaps before tapeout
  • Debug failures and root-cause issues, working closely with designers to resolve issues
  • Leverage AI tools to optimize ve...

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Job Details

  • Location Singapore, Singapore
  • Job Type Full-time
  • Category other-general
  • Posted Date June 08, 2026
  • Application Deadline July 18, 2026