Senior Design Verification Engineer

We are looking for experienced Design Verification Engineers to join our team.

Locations: Bengaluru & Hyderabad

Experience: 5+ Years

Key Requirements:

✔️ Strong Design Verification experience using SystemVerilog and UVM

✔️ Hands-on experience with PCIe Gen4, Gen5, & Gen6 protocols

✔️ Experience in testbench development, debugging, and coverage closure

✔️ Strong understanding of verification methodologies and protocol compliance

✔️ Experience in assertion-based verification and functional coverage is a plus

If you‘re interested in exploring this opportunity, please share your updated resume or connect with me directly on

Ready to Apply?

Submit your application today and join our talented team at Silicon Patterns.