Job Description
Job Description
The ideal candidate should have strong expertise in advanced technology nodes and exposure to high-speed interfaces such as SerDes.
Experience: 4+Years
Work Location: Bangalore/Hyderabad
Key Responsibilities:
Perform full-custom analog and mixed-signal layout for IPs and SoCs
Handle layout of critical blocks such as SerDes, PLL, ADC/DAC, LDO, Bandgap, etc.
Work on advanced/lower technology nodes (e.g., Tsmc 7nm/5nm/3nm/2nm)
Ensure matching, symmetry, shielding, and parasitic control in layout
Perform DRC, LVS, ERC, and resolve layout-related issues.
SerDes layout experience is highly preferred.
Exposure to high-speed and low-noise design considerations.
Experience working in tape-out driven environments
Regards,
Sruthi
Mail Id:
The ideal candidate should have strong expertise in advanced technology nodes and exposure to high-speed interfaces such as SerDes.
Experience: 4+Years
Work Location: Bangalore/Hyderabad
Key Responsibilities:
Perform full-custom analog and mixed-signal layout for IPs and SoCs
Handle layout of critical blocks such as SerDes, PLL, ADC/DAC, LDO, Bandgap, etc.
Work on advanced/lower technology nodes (e.g., Tsmc 7nm/5nm/3nm/2nm)
Ensure matching, symmetry, shielding, and parasitic control in layout
Perform DRC, LVS, ERC, and resolve layout-related issues.
SerDes layout experience is highly preferred.
Exposure to high-speed and low-noise design considerations.
Experience working in tape-out driven environments
Regards,
Sruthi
Mail Id:
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Submit ApplicationJob Details
- Location Bengaluru, Karnataka
- Job Type Full-time
- Category Engineers
- Posted Date June 19, 2026
- Application Deadline July 29, 2026