Job Description
UST Malaysia in Penang is seeking an experienced analog/mixed-signal circuit design engineer to design high-speed interfaces like SerDes and DDR, and to develop clocking and power management circuits. You will perform transistor-level simulations and collaborate with layout teams to ensure robust tapeouts.
The role requires 4+ years in analog/mixed-signal design, proficiency with Cadence Virtuoso/ADE/Spectre, and strong knowledge of noise and signal integrity across ≤7nm nodes.
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Submit ApplicationJob Details
- Location bayan lepas, penang
- Job Type Full-time
- Category Engineering
- Posted Date July 27, 2026
- Application Deadline September 05, 2026