Job Description
Hi All,
Currently i am looking for senior RTL Design Engineers for both Location ( HYD & BLR)
Exp - 8+ yrs
Location - BLR & HYD
Client - Product Client
Notice Period - Immediate to 15 days
JD 1 : ( BLR Location)
RTL coding,
Integration (SOC)
Quality check, lint, CDC, RDC, synthesis, DFT insertion, vclp checks.
RTL Design (SoC Integration & IP Enhancement)
JD 2 : ( HYD Location)
RTL Design, SOC integration with MIPI Protocols.
Interested candidates, Kindly share with me your updated profile to [email protected]
Ready to Apply?
Submit your application today and join our talented team at Modernize Chip Solutions (MCS).
Submit ApplicationJob Details
- Location Bengaluru, Karnataka
- Job Type Full-time
- Category Engineers
- Posted Date March 01, 2026
- Application Deadline April 10, 2026