Programmable Logic Design Engineer

Viasat
📍 lausanne, waadt, Switzerland 💼 Full-time 🕒 Posted June 05, 2026

Job Description

What you'll do

In this role you will help develop FPGA designs for Viasat next generation terminal products, including interfaces and high speed signal processing algorithms and/or network protocols in FPGAs. The individual will be responsible for the full design phase starting from the requirements' phase to documentation, block diagrams, implementation of source code, simulation, place & route, testing in hardware, and integration.

The day-to-day

  • Collaborate with team members to jointly develop high-speed digital signal processing and waveform processing algorithms supporting satellite communications applications
  • Develop testbenches and help maintain and update system level verification environment
  • Synthesize Verilog and System Verilog for Altera and Xilinx/AMD FPGAs
  • Develop timing constraints, analyze timing results, and implement design changes required to close timing
  • Generate and collaborate on requir...

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Job Details

  • Location lausanne, waadt
  • Job Type Full-time
  • Category Other-General
  • Posted Date June 05, 2026
  • Application Deadline July 15, 2026