Job Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
+ Bachelor’s degree is required, with 6+ years of experience in IC design, electronic engineering, or computer science–related applications.
+ Familiar with analog design flows, including circuit and layout design, physical verification (DRC/LVS/Dummy Fill), and post‑layout RC extraction flows.
+ Solid understanding of Spice models and simulation flows is a strong plus.
+ Basic understanding of semiconductor manufacturing processes (e.g., CMOS process fundamentals, PDK concepts, variability considerations).
+ Experience supporting foundry is highly preferred.
+ Proficient in programing languages, including PERL/TCL/SKILL., experience w/ Cadence PAS/Pcell Designer tool is a plus.
+ Strong communication skills, self‑motivated, with a collaborative mindset and customer‑oriented attitude.
+ MS degree and/or pr...
+ Bachelor’s degree is required, with 6+ years of experience in IC design, electronic engineering, or computer science–related applications.
+ Familiar with analog design flows, including circuit and layout design, physical verification (DRC/LVS/Dummy Fill), and post‑layout RC extraction flows.
+ Solid understanding of Spice models and simulation flows is a strong plus.
+ Basic understanding of semiconductor manufacturing processes (e.g., CMOS process fundamentals, PDK concepts, variability considerations).
+ Experience supporting foundry is highly preferred.
+ Proficient in programing languages, including PERL/TCL/SKILL., experience w/ Cadence PAS/Pcell Designer tool is a plus.
+ Strong communication skills, self‑motivated, with a collaborative mindset and customer‑oriented attitude.
+ MS degree and/or pr...
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Submit ApplicationJob Details
- Location Shanghai, China
- Job Type Full-time
- Category other-general
- Posted Date June 10, 2026
- Application Deadline June 15, 2026