Principal Hardware Engineer

You will work on the design of a state-of-the-art, novel datacenter CPU, give guidance and constraints for the RTL development team with respect to the physical constraints of developing a chip.

Your responsibilities

• Lead hardware design
• Drive CPU Processor Block design, including proprietary CPU ISA, interfaces, memory, and logic integration.
• Collaborate in a flexible, dynamic team environment.
• Guide RTL development team considering physical chip constraints.

Requirements

• Experience in hardware, ASIC, and SoC design including commercial tools and PDKs
• Interest in OpenROAD, Chisel, and functional programming. Training will be provided
• Knowledge of CPU design, layout, macro partitioning, SRAM macros, clock tree synthesis, and power management

Ready to Apply?

Submit your application today and join our talented team at Ascenium.