Principal DFT Design Engineer

Cadence Design Systems, Inc.
📍 Bangalore, India, India 💼 Full-time 🕒 Posted June 10, 2026

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
· This role requires close interaction with multiple cross functional teams across geographies to align on project receivables/deliverables.

· Mentoring junior engineers and driving innovation/automation.

· BE/B.Tech/M.E/M.Tech with 7+ years of relevant work experience and strong understanding of DFT concepts and good communication skills.

· Strong hands-on experience using industry standard EDA Tools.

· Experience with logic simulators from one or more EDA vendors.

· Experience on industry standard ATPG tools like Cadence Modus.

· Experience with RTL lint tools like Jasper.

· Experience in scan insertion, coverage analysis and debugging skills on faults coverage enhancement is required.

· Programming in Perl/Tcl/Python or other scripting languages is a plus.

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Job Details

  • Location Bangalore, India
  • Job Type Full-time
  • Category other-general
  • Posted Date June 10, 2026
  • Application Deadline June 15, 2026