Job Description
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Responsible for the development of Pegasus, our next-generation massively parallel DRC (Design Rule Check) product.
Performs as individual contributor on case analysis, problem solving, validation and documentation.
Working closely with PE and QPV for the DRC/FILL deck developing and QC pattern generation.
We’re doing work that matters. Help us solve what others can’t.
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Submit ApplicationJob Details
- Location Taiwan, Hsinchu City
- Job Type Full time
- Category Computer Occupations
- Posted Date June 21, 2026
- Application Deadline July 31, 2026