Lead RTL Design Validation Engineer

We are seeking an experienced, highly motivated and high-caliber individual with below expertise. Does this sound like a good role for you?

• Staff RTL Design & Verification Engineer (R&D Engineering)
• Location: Bangalore
• Experience: 5yrs to 12yrs
• BSEE/MSEE in Electrical Engineering, Computer Engineering, or a related field.
• 5 years of hands-on experience in RTL design and verification.
• Proficiency in Verilog, System Verilog, TCL scripting, and Formal Verification methodologies.
• Experience working in Unix/Linux environments.
• Strong debugging and problem-solving skills, especially in complex chip design environments.
• Excellent written and verbal communication skills in English.
• Knowledge of digital, analog, and mixed-signal IP/circuit design (a plus).
• Familiarity with 3D-IC standards and semiconductor...

Ready to Apply?

Submit your application today and join our talented team at Synopsys Inc.