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Intern Design Engineer (ME)

Cadence Design Systems, Inc.
📍 Nanjing, Jiangsu, China 💼 Full time 🕒 Posted February 22, 2026
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Job Description

Description

: AI Initiatives Intern (SSG - Digital IC Design)

Position Overview:
As the company accelerates its transformation with AI technologies, we are seeking a highly motivated and creative AI Initiatives Intern to join our IP development team. This role will focus on supporting digital integrated circuit (IC) design efforts, specifically within synthesis, DFT (Design for Test), and STA (Static Timing Analysis), while also driving AI-related initiatives to bring innovation to our design processes.

Key Responsibilities:

  •  Assist in the design and development of digital ICs, with a focus on synthesis, DFT, and STA processes.
  •  Support the team in optimizing and automating key design flows, ensuring the smooth integration of AI tools in the digital IC sign-off process.
  •  Collaborate with the team on the design verification process, providing assistance in test planning and execution, as well as timing closure.

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    Job Details

    • Location Nanjing, Jiangsu
    • Job Type Full time
    • Category Engineers
    • Posted Date February 22, 2026
    • Application Deadline April 03, 2026