Ingeniero/a Junior de Hardware (SOC - FPGA y Firmware)

GMV
📍 Tres Cantos, Comunidad de Madrid, Spain 💼 Full-time 🕒 Posted July 02, 2026

Job Description

You will join the Receiver team to participate in the design of digital hardware and firmware in FPGA/SoC based embedded systems. This position is oriented towards long term collaboration on projects in the Receivers and equipment unit, with participation in current and future developments.

Functions:

  • Coding in VHDL/Verilog.
  • Verification by testbenches
  • Code coverage checking
  • Synthesis, implementation, bitstream generation
  • Resource optimization, process automation and technical documentation.
  • WHAT DO WE NEED IN OUR TEAM?

    For this position, we are looking for software engineering graduates with background and interest in VHDL/Verilog, FPGA development tools (Vivado, ModelSIM), synthesis and implementation, scripting (Python, TCL, Shell), C/C++/Rust, functional verification.

    We will also value previous experience, and knowledge of standard interfaces (SPI, I2C, Ethernet, etc.),...

    Ready to Apply?

    Submit your application today and join our talented team at GMV.

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    Job Details

    • Location Tres Cantos, Comunidad de Madrid
    • Job Type Full-time
    • Category Engineers
    • Posted Date July 02, 2026
    • Application Deadline August 11, 2026