Job Description
Enhance telecommunications technology with Ciena as a Mixed Signal Design Engineer focused on high-speed DAC and ADC solutions. Collaborate with a dedicated team to innovate in the fiber-optic industry.
In this pivotal role, you will report to the Senior Manager of Analog Engineering and leverage your electrical or computer engineering degree to design high precision Sigma-Delta DACs and ADCs. Your experience with SystemVerilog and Cadence tools will be critical in creating models for SerDes IP operating at up to 448Gbps. Join a successful team recognized for thirty years of advancements in broadband high-speed circuits.
Key Responsibilities:
• Design Sigma-Delta DAC and ADC for monitoring
• Create SystemVerilog models for analog macros
• Develop IBIS-AMS models for SerDes IP
• Write detailed Design Specification Document
• Provide support to various engineering teams
Requirements:
• BEng/BSc or higher in relevant field
• Experience with CMOS and BiCMOS te...
In this pivotal role, you will report to the Senior Manager of Analog Engineering and leverage your electrical or computer engineering degree to design high precision Sigma-Delta DACs and ADCs. Your experience with SystemVerilog and Cadence tools will be critical in creating models for SerDes IP operating at up to 448Gbps. Join a successful team recognized for thirty years of advancements in broadband high-speed circuits.
Key Responsibilities:
• Design Sigma-Delta DAC and ADC for monitoring
• Create SystemVerilog models for analog macros
• Develop IBIS-AMS models for SerDes IP
• Write detailed Design Specification Document
• Provide support to various engineering teams
Requirements:
• BEng/BSc or higher in relevant field
• Experience with CMOS and BiCMOS te...
Ready to Apply?
Submit your application today and join our talented team at Ciena.
Submit ApplicationJob Details
- Location ottawa, on
- Job Type Full-time
- Category Other-General
- Posted Date June 09, 2026
- Application Deadline July 19, 2026