Job Description
Job Description1. Work with design teams to do performance sign off in pre-silicon stage
2. ESL platform and simulation/emulation technology development.
3. Model development (includes behavior modeling/ cycle approximate modeling)
#LI-LL1Requirement1. Familiar with Verilog/SystemVerilog/C++/Perl/Python
2. Familiar with computer architecture
3. Familiar with industry bus protocols (APB, AXI, ACE, CHI and etc).
4. Good knowledge of embedded system design is a plus
5. Good knowledge of SystemC/TLM is a plus
6. RTL design experience is a plus
2. ESL platform and simulation/emulation technology development.
3. Model development (includes behavior modeling/ cycle approximate modeling)
#LI-LL1Requirement1. Familiar with Verilog/SystemVerilog/C++/Perl/Python
2. Familiar with computer architecture
3. Familiar with industry bus protocols (APB, AXI, ACE, CHI and etc).
4. Good knowledge of embedded system design is a plus
5. Good knowledge of SystemC/TLM is a plus
6. RTL design experience is a plus
Ready to Apply?
Submit your application today and join our talented team at MediaTek.
Submit ApplicationJob Details
- Location Zhubei City, Hsinchu County
- Job Type Full-time
- Category Engineers
- Posted Date February 27, 2026
- Application Deadline April 08, 2026