Digital Designer — CPU Subsystem (RTL & Verification) (Temporary Assignment)

Design and verify the CPU subsystem at the heart of imec's RISC-V compute prototypes.

Compute System Architecture (CSA) is imec's center of excellence for hardware-software-technology co-design of future compute systems. We work in close collaboration with imec's expertise centers in applications, technology, circuits, and design to innovate and pathfind next-generation compute architectures across AI, HPC, automotive, space, and other domains. CSA operates across six imec centers Belgium, the Netherlands, Germany, the UK, the USA, and Qatar. This position is based primarily in Leuven, Belgium. 

We are looking for a Digital Designer to join the Platform, Prototypes and Physical-Aware Design (P3D) group, with a focus on the CPU subsystem of imec's RISC-V-based compute platforms. You will own RTL design of CPU-side blocks pipelines, caches, memory hierarchy, and the surrounding interconnect logic and drive their verification from unit-level testing through subsystem-level ...

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