Design Verification Engineer

Design Verification Engineer

_corporate_fare_ Google _place_ Mountain View, CA, USA

**Mid**

Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area.

**Minimum qualifications:**

+ Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
+ 8 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
+ Experience developing and maintaining verification test benches, test cases, and test environments.

**Preferred qualifications:**

+ Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
+ Experience in low-power design verification.
+ Experience with different verification techniques and methodologies including formal, GLS, UPF bas...

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