Job Description
We are expanding our team and looking for a DDR Verification Engineer with strong DDR5 expertise.
Location: Bangalore
Experience: 5+ Years
Notice Period: Immediate to 60 Days
Key Requirements:
- Hands-on experience in DDR4/DDR5 verification
- Strong knowledge of JEDEC DDR5 protocol & memory controller architecture
- Expertise in SystemVerilog & UVM
- Experience in SoC/ASIC verification environment
- Good debugging & coverage closure skills
Good to Have:
- Exposure to LPDDR5
- Experience with PHY & controller verification
- Scripting knowledge (Python/Perl/TCL)
If you’re interested or know someone suitable, please share your resume or connect via DM.
Ready to Apply?
Submit your application today and join our talented team at Silicon Patterns.
Submit ApplicationJob Details
- Location Bangalore Division, Karnataka
- Job Type Full-time
- Category Engineers
- Posted Date February 18, 2026
- Application Deadline March 30, 2026