ASIC Verification Engineer - PMU

Nvidia
📍 Shanghai, China, China 💼 Full-time 🕒 Posted February 18, 2026

Job Description



As chip sizes continue to grow, power efficiency has become critical across all NVIDIA products - from data centers to automotive and personal computing. Our PMU IP, developed over the past 17 years, is crucial in optimizing chip performance and efficiency in both idle and active scenarios. The PMU IP consists of a RISC-V core and custom-designed control logic. It collects and processes data from the entire chip, working in tandem with software running on the RISC-V core to determine optimal operating points. We are seeking a Senior Verification Engineer to join our Power Management Unit (PMU) IP team to help building more powerful PMU engine.







What you’ll be doing:

+ Co-work with the IP architect and designer to define the IP verification methodology and test plan. Finishing the IP verification for all new coming features from project to project.

+ Maintain and improve the UVM based unit-level TB to be powerful and ef...

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Job Details

  • Location Shanghai, China
  • Job Type Full-time
  • Category other-general
  • Posted Date February 18, 2026
  • Application Deadline March 23, 2026