Asic Static Timing Analysis Engineer (Tijuana)

We are looking for motivated engineers with Static timing analysis skill; good knowledge on timing convergence and corner definition in advanced tech nodes.
If you have expertise in this area and are excited by driving leading edge semiconductor technologies that make differences on this world, this is the opportunity for you.
Experience in various STA tools, timing signoff margin development, Timing sign off Corner development, Full chip timing closure, tape‐out, and post‐silicon analysis is an excellent skill to have in this position.
As an ASIC Timing analysis engineer, you will be responsible for all aspects of timing including defining corners, helping construct and/or modify flows, PPA improvement, timing bottleneck analysis and timing closure.
Key Qualifications As an ASIC Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile, Compute, Automotive and IOT markets You will be working with physical design on timing closure, CAD teams...

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