ASIC Design Engineer, STA

Cisco
📍 San Jose, CA, United States 💼 Full-time 🕒 Posted July 04, 2026

Job Description

The application window is expected to close on: 07/31/2026
**Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received** .

**Meet the Team**

Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks. Cisco’s silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym, healthcare, and café, social interest groups, and philanthropy), with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide.

Within this role, you'll work on closing timing at block, sub-chip, and full-chip levels, performing quality checks such as setup, hold, transition, and noise, while handling ECO tasks.

**Your Impact**

As an ASIC Design Engineer on the STA team, you will play a pivot...

Ready to Apply?

Submit your application today and join our talented team at Cisco.

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Job Details

  • Location San Jose, CA
  • Job Type Full-time
  • Category other-general
  • Posted Date July 04, 2026
  • Application Deadline July 10, 2026