Analog SerDes/PLL Circuit Design Engineer

MediaTek
📍 Hsinchu City, Taiwan Province, Taiwan 💼 Full-time 🕒 Posted March 02, 2026

Job Description

Job DescriptionHigh speed analog SerDes/PLL circuit design
Work Location:HsinChu/ChuPei/Taipei/Tainan

#LI-DC3RequirementBe familiar with high speed analog SerDes circuit design, like CTLE, CDR, DFE, PLL and TX Driver

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Job Details

  • Location Hsinchu City, Taiwan Province
  • Job Type Full-time
  • Category Engineers
  • Posted Date March 02, 2026
  • Application Deadline April 11, 2026